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Instruction set architectures
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#	Item
581	DECchip[removed]and DECchip[removed]Core Logic Chipsets Data Sheet Order Number: EC–QAEMB–TE Revision/Update Information: Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:03:54 Instruction set architectures Computer memory Alpha 21064 Computer buses Minicomputers DEC Alpha Conventional PCI CPU cache VAX Computer hardware Computer architecture Computing
582	Product guide HP ProLiant scale-up solutions, powered by AMD Opteron™ Ready for growth with faster, smarter x86 scale-up servers Add to Reading List Source URL: h20195.www2.hp.com Language: English Server hardware ProLiant Instruction set architectures Blade server Advanced Micro Devices HP Integrated Lights-Out Opteron Hewlett-Packard Hyper-V System software Computing Computer architecture
583	ST Sitronix ST7920 Chinese Fonts built in LCD controller/driver Add to Reading List Source URL: www.hpinfotech.ro Language: English - Date: 2014-10-30 10:26:19 Microcontrollers Instruction set architectures
584	M PIC16F87XA Data Sheet[removed]pin Enhanced FLASH Microcontrollers Add to Reading List Source URL: optimus.meleeisland.net Language: English Electronic engineering Electronic circuits Instruction set architectures Computer memory PIC microcontroller In-circuit serial programming Input/output EEPROM Microchip Technology Microcontrollers Electronics Computer hardware
585	Using an Adaptive HPC Runtime System to Reconfigure the Cache Hierarchy Ehsan Totoni, Josep Torrellas, Laxmikant V. Kale Department of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL 61801, USA E Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2014-08-13 13:31:19 Computer memory Computer hardware CPU cache Central processing unit Instruction set architectures Cache algorithms Memory hierarchy Blue Gene Xeon Computer architecture Computing Cache
586	Capability Hardware Enhanced RISC Instructions: CHERI Instruction-set architecture Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2015-01-15 09:17:36 MIPS architecture Ring Instruction set Capability-based security 64-bit Hypervisor Kernel Reduced instruction set computing Memory protection Computer architecture Central processing unit Instruction set architectures
587	AD2100-12-2M-104P-DMA, 12-Bit, 100 MS/sec, PC/104+ Digitizer[removed]Chase Scientific Company - Innovators in Embedded Test & Measurement Add to Reading List Source URL: www.chase2000.com Language: English - Date: 2014-03-20 17:00:23 Microcontrollers Computer buses Computing Instruction set architectures Computer architecture IBM PC compatibles Computer hardware
588	MIPS Code for Tiger COMS W4115 Prof. Stephen A. Edwards Spring 2002 Columbia University Department of Computer Science Add to Reading List Source URL: www.cs.columbia.edu Language: English - Date: 2002-04-07 23:14:04 Instruction set architectures MIPS architecture J Processor register T0 MOV Computer architecture Computing Software engineering
589	A Brief History of RISC, the IBM RS/6000 and the IBM eServer pSeries Reduced Instruction Set Computer (RISC) architecture is the basis for most workstations and UNIX-based servers in use today, and is widely viewed as th Add to Reading List Source URL: www-03.ibm.com Language: English - Date: 2005-12-19 13:42:33 Power Architecture Classes of computers Instruction set architectures IBM System p RS/6000 IBM AIX PowerPC IBM eServer 64-bit Computer architecture Computing Server hardware
590	OpenVMS Quality, Commitment, Strategy [removed] VMS Software Inc. (VSI) is committed to developing, delivering, supporting and enhancing OpenVMS well into the future. Our primary goal is t Add to Reading List Source URL: vmssoftware.com Language: English - Date: 2014-09-28 21:51:56 Instruction set architectures Hewlett-Packard Cluster computing OpenVMS Parallel computing Itanium HP Integrity Servers DEC Alpha Computing Computer architecture Concurrent computing

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